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cpu: add HPDS, LOR, PAN detection for arm64

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This CL gets ID_AA64MMFR1_EL1, Memory Model Feature Register 1, and
grabs HPDS, LOR, PAN features from its bits.

Fixes golang/go#75472.

Change-Id: Ic04b109d79aceba9b3b1d3a1ea514fcf132007c5
GitHub-Last-Rev: f938ff468bca49cc7863aa26e7a880eec2823bb4
GitHub-Pull-Request: golang/sys#263
Reviewed-on: https://go-review.googlesource.com/c/sys/+/704075
Reviewed-by: Keith Randall <khr@google.com>
Auto-Submit: Keith Randall <khr@golang.org>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Keith Randall <khr@golang.org>
This commit is contained in:
Chongyi Zheng
2025-10-28 09:43:50 -07:00
committed by Gopher Robot
parent ea436ef09d
commit 6239615695
7 changed files with 33 additions and 4 deletions
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cpu/cpu.go
+3
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@@ -92,6 +92,9 @@ var ARM64 struct {
HasSHA2 bool // SHA2 hardware implementation
HasCRC32 bool // CRC32 hardware implementation
HasATOMICS bool // Atomic memory operation instruction set
HasHPDS bool // Hierarchical permission disables in translations tables
HasLOR bool // Limited ordering regions
HasPAN bool // Privileged access never
HasFPHP bool // Half precision floating-point instruction set
HasASIMDHP bool // Advanced SIMD half precision instruction set
HasCPUID bool // CPUID identification scheme registers